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 PD - 94357
SMPS MOSFET
IRFB52N15D IRFS52N15D IRFSL52N15D
HEXFET(R) Power MOSFET
l
Applications High frequency DC-DC converters
VDSS
150V
RDS(on) max
0.032
ID
60A
Benefits Low Gate-to-Drain Charge to Reduce Switching Losses l Fully Characterized Capacitance Including Effective COSS to Simplify Design, (See App. Note AN1001) l Fully Characterized Avalanche Voltage and Current
l
TO-220AB IRFB52N15D
D2Pak IRFS52N15D
TO-262 IRFSL52N15D
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TA = 25C PD @TC = 25C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torqe, 6-32 or M3 screw
Max.
60 43 240 3.8 320 2.1 30 5.5 -55 to + 175 300 (1.6mm from case ) 10 lbf*in (1.1N*m)
Units
A W W/C V V/ns C
Thermal Resistance
Parameter
RJC RCS RJA RJA Notes through Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Junction-to-Ambient
Typ.
--- 0.50 --- ---
Max.
0.47 --- 62 40
Units
C/W
are on page 11
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1
12/12/01
IRFB/IRFS/IRFSL52N15D
Static @ TJ = 25C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS IGSS Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. 150 --- --- 3.0 --- --- --- --- Typ. --- 0.16 --- --- --- --- --- --- Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 0.032 VGS = 10V, ID = 36A 5.0 V VDS = VGS, ID = 250A 25 VDS = 150V, VGS = 0V A 250 VDS = 120V, VGS = 0V, TJ = 150C 100 VGS = 30V nA -100 VGS = -30V
Dynamic @ TJ = 25C (unless otherwise specified)
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 19 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- 79 25 34 16 47 28 25 2770 590 110 3940 260 550 Max. Units Conditions --- S VDS = 50V, ID = 36A 120 ID = 36A 37 nC VDS = 120V 51 VGS = 10V, --- VDD = 75V --- ID = 36A ns --- RG = 2.5 --- VGS = 10V --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 120V, = 1.0MHz --- VGS = 0V, VDS = 0V to 120V
Avalanche Characteristics
Parameter
EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Typ.
--- --- ---
Max.
470 36 32
Units
mJ A mJ
Diode Characteristics
IS
ISM
VSD trr Qrr ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol 60 --- --- showing the A G integral reverse --- --- 240 S p-n junction diode. --- --- 1.5 V TJ = 25C, IS = 36A, VGS = 0V --- 140 210 nS TJ = 25C, IF = 36A --- 780 1170 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRFB/IRFS/IRFSL52N15D
1000
VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP
1000
ID , Drain-to-Source Current (A)
100
ID , Drain-to-Source Current (A)
100
VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP
10
10
5.0V
1
5.0V
1
300s PULSE WIDTH Tj = 25C
0.1 0.1 1 10 100 0.1 0.1 1
300s PULSE WIDTH Tj = 175C
10 100
VDS, Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000.00
3.0
I D = 60A
ID, Drain-to-Source Current ( )
2.5
RDS(on) , Drain-to-Source On Resistance
100.00
(Normalized)
T J = 175C
2.0
1.5
10.00
T J = 25C
1.0
1.00 5.0 7.0 9.0
VDS = 15V 300s PULSE WIDTH
11.0 13.0 15.0
0.5
0.0 -60 -40 -20 0 20 40 60 80
V GS = 10V
100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature
( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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3
IRFB/IRFS/IRFSL52N15D
100000
12
VGS = 0V, f = 1 MHZ Ciss = C + Cgd, C gs ds SHORTED Crss = C gd Coss = C + C ds gd
ID = 36A
10
V DS = 120V V DS = 75V V DS = 30V
10000
C, Capacitance(pF)
Ciss
1000
VGS, Gate-to-Source Voltage (V)
7
Coss
100
5
Crss
2
10 1 10 100 1000
0 0 20 40 60 80 100
VDS, Drain-to-Source Voltage (V)
Q G, Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000.00
1000 OPERATION IN THIS AREA LIMITED BY R DS(on)
T J = 175C
100.00
ID , Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100 100sec 10 1msec
10.00 T J = 25C 1.00 VGS = 0V 0.10 0.0 0.5 1.0 1.5 2.0 2.5 VSD , Source-toDrain Voltage (V)
1 Tc = 25C Tj = 175C Single Pulse 1 10 100
10msec
0.1
1000
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFB/IRFS/IRFSL52N15D
70
VDS
60
RD
VGS RG
D.U.T.
+
50
-VDD
I D , Drain Current (A)
40
10V
Pulse Width 1 s Duty Factor 0.1 %
30
Fig 10a. Switching Time Test Circuit
20
VDS
10
90%
0 25 50 75 100 125 150 175
TC , Case Temperature
( C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10b. Switching Time Waveforms
1
(Z thJC )
D = 0.50
0.1
0.20 0.10
Thermal Response
0.05 0.02 0.01 0.01
SINGLE PULSE (THERMAL RESPONSE) Notes:
0.001 0.00001
1. Duty factor D = 2. Peak T
J
P DM t1 t2 +TC 1
t1 / t 2
= P DM x Z thJC 0.1
0.0001
0.001
0.01
t 1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFB/IRFS/IRFSL52N15D
1 5V
900
VDS
L
D R IV E R
720
TOP ID 15A 26A 36A BOTTOM
RG
20V tp
D .U .T
IA S
+ V - DD
E AS , Single Pulse Avalanche Energy (mJ)
540
A
0 .0 1
360
Fig 12a. Unclamped Inductive Test Circuit
180
V (B R )D SS tp
0 25 50 75 100 125 150 175
Starting Tj, Junction Temperature
( C)
IAS
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
QG
50K 12V .2F .3F
10 V
QGS VG QGD
D.U.T. VGS
3mA
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRFB/IRFS/IRFSL52N15D
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFETs
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7
IRFB/IRFS/IRFSL52N15D
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
2 .8 7 (.1 1 3 ) 2 .6 2 (.1 0 3 )
1 0 .5 4 (.4 1 5 ) 1 0 .2 9 (.4 0 5 )
3 .7 8 (.1 4 9 ) 3 .5 4 (.1 3 9 ) -A6.4 7 (.2 5 5 ) 6.1 0 (.2 4 0 )
-B4 .6 9 (.1 8 5 ) 4 .2 0 (.1 6 5 ) 1 .3 2 (.0 5 2 ) 1 .2 2 (.0 4 8 )
4 1 5 .2 4 (.6 0 0 ) 1 4 .8 4 (.5 8 4 )
1 .1 5 (.0 4 5 ) M IN 1 2 3
L E A D A S S IG N M E N T S 1 - GATE 2 - D R A IN 3 - S OU RC E 4 - D R A IN
1 4 .0 9 (.5 5 5 ) 1 3 .4 7 (.5 3 0 )
4 .0 6 (.1 6 0 ) 3 .5 5 (.1 4 0 )
3X 3X 1 .4 0 (.0 5 5 ) 1 .1 5 (.0 4 5 )
0 .9 3 (.0 3 7 ) 0 .6 9 (.0 2 7 ) M BAM
3X
0 .5 5 (.0 2 2 ) 0 .4 6 (.0 1 8 )
0 .3 6 (.0 1 4 )
2 .5 4 (.1 0 0) 2X N O TE S : 1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 . 2 C O N T R O L L IN G D IM E N S IO N : IN C H
2 .9 2 (.1 1 5 ) 2 .6 4 (.1 0 4 )
3 O U T L IN E C O N F O R M S T O J E D E C O U T L IN E T O -2 2 0 A B . 4 H E A T S IN K & L E A D M E A S U R E M E N T S D O N O T IN C L U D E B U R R S .
TO-220AB Part Marking Information
EXAMPLE: THIS IS AN IRF1010 LOT CODE 1789 ASSEMBLED ON WW 19, 1997 IN THE ASSEMBLY LINE "C"
INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE
PART NUMBER
DATE CODE YEAR 7 = 1997 WEEK 19 LINE C
8
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IRFB/IRFS/IRFSL52N15D
D2Pak Package Outline
1 0.54 (.4 15) 1 0.29 (.4 05) 1.4 0 (.055 ) M AX. -A2
4.69 (.1 85) 4.20 (.1 65)
-B 1.3 2 (.05 2) 1.2 2 (.04 8)
1 0.16 (.4 00 ) RE F.
6.47 (.2 55 ) 6.18 (.2 43 ) 15 .4 9 (.6 10) 14 .7 3 (.5 80) 5 .28 (.20 8) 4 .78 (.18 8) 2.7 9 (.110 ) 2.2 9 (.090 ) 2.61 (.1 03 ) 2.32 (.0 91 ) 1.3 9 (.0 5 5) 1.1 4 (.0 4 5) 8.8 9 (.3 50 ) R E F.
1.7 8 (.07 0) 1.2 7 (.05 0)
1
3
3X
1.40 (.0 55) 1.14 (.0 45) 3X 5 .08 (.20 0)
0 .93 (.03 7 ) 0 .69 (.02 7 ) 0 .25 (.01 0 ) M BAM
0.5 5 (.022 ) 0.4 6 (.018 )
M IN IM U M R E CO M M E ND E D F O O TP R IN T 1 1.43 (.4 50 )
NO TE S: 1 D IM EN S IO N S A FTER SO L D ER D IP. 2 D IM EN S IO N IN G & TO LE RA N C IN G PE R A N S I Y1 4.5M , 198 2. 3 C O N TRO L LIN G D IM EN SIO N : IN C H . 4 H E ATSINK & L EA D D IM EN S IO N S D O N O T IN C LU D E B UR R S.
LE A D A SS IG N M E N TS 1 - G A TE 2 - D R AIN 3 - S O U RC E
8.89 (.3 50 ) 17 .78 (.70 0)
3 .8 1 (.15 0) 2 .08 (.08 2) 2X 2.5 4 (.100 ) 2X
D2Pak Part Marking Information
THIS IS AN IRF530S WITH LOT CODE 8024 ASSEMBLED ON WW 02, 2000 IN THE ASSEMBLY LINE "L" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER F530S DATE CODE YEAR 0 = 2000 WEEK 02 LINE L
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9
IRFB/IRFS/IRFSL52N15D
TO-262 Package Outline
TO-262 Part Marking Information
EXAMPLE: THIS IS AN IRL3103L LOT CODE 1789 ASSEMBLED ON WW 19, 1997 IN THE ASSEMBLY LINE "C"
INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE
PART NUMBER
DATE CODE YEAR 7 = 1997 WEEK 19 LINE C
10
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IRFB/IRFS/IRFSL52N15D
D2Pak Tape & Reel Information
TR R
1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 4 .1 0 ( .1 6 1 ) 3 .9 0 ( .1 5 3 )
1 .6 0 (.0 6 3 ) 1 .5 0 (.0 5 9 ) 0.3 6 8 (.01 4 5 ) 0.3 4 2 (.01 3 5 )
F E E D D IR E C TIO N 1 .8 5 ( .0 7 3 )
1 .6 5 ( .0 6 5 )
1 1.6 0 (.4 57 ) 1 1.4 0 (.4 49 )
1 5 .42 (.60 9 ) 1 5 .22 (.60 1 )
2 4 .3 0 (.9 5 7 ) 2 3 .9 0 (.9 4 1 )
TRL
1 0.9 0 (.4 2 9) 1 0.7 0 (.4 2 1) 1 .75 (.06 9 ) 1 .25 (.04 9 ) 16 .1 0 (.63 4 ) 15 .9 0 (.62 6 ) 4 .7 2 (.1 3 6) 4 .5 2 (.1 7 8)
F E E D D IR E C T IO N
13.50 (.532 ) 12.80 (.504 )
2 7.4 0 (1.079 ) 2 3.9 0 (.9 41) 4
3 30 .00 ( 14.1 73 ) MAX.
6 0.0 0 (2.36 2) M IN .
Notes:
N O TE S : 1 . CO M F OR M S TO E IA -418 . 2 . CO N TR O L LIN G D IM E N SIO N : M IL LIM E T ER . 3 . DIM E NS IO N M EA S UR E D @ H U B. 4 . IN C LU D ES FL AN G E DIST O R T IO N @ O UT E R E D G E.
26 .40 (1 .03 9) 24 .40 (.9 61 ) 3
30.4 0 (1.19 7) M A X. 4
Repetitive rating; pulse width limited by
max. junction temperature. Starting TJ = 25C, L = 0.72mH RG = 25, IAS = 36A. ISD 36A, di/dt 400A/s, VDD V(BR)DSS, TJ 175C.
Pulse width 300s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
This is only applied to TO-220AB package.
This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] (IRFB52N15D), & Industrial (IRFS/SL52N15D) market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.12/01
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11


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